Field of the Disclosure
The present disclosure relates generally to flip-flops and more particularly relates to flip-flops with soft error suppression.
Description of the Related Art
Processors and other integrated circuits are often subject to environmental conditions that can cause temporary disruptions in device operation. For example, alpha particles or other high energy particles in the environment of an integrated circuit can change the state of digital information stored at a flip-flop of the integrated circuit from a desired or expected state. This disruption is referred to generally as a soft error, and more specifically as a single error upset (SEU). While an SEU is temporary, in that it will typically not recur if the integrated circuit is reset, it can seriously impact operation of the integrated circuit, at least temporarily. Accordingly, it is often beneficial to employ in the integrated circuit flip-flops that are resistant to SEU.
One example of an SEU resistant flip-flop is one that employs triple voting circuitry, also referred to as triple module redundancy (TMR). A TMR flip-flop stores its bit of data in three separate storage modules. Each module “votes” on the output of the TMR flip-flop, such that the flip-flop outputs the state corresponding to the majority of the data stored at the three storage modules. Thus, the output state is resistant to an SEU at one of the three storage modules. However, because of the three storage modules, a TMR flip-flop requires a relatively large amount of circuit area and consumes a large amount of power.